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SmartDV Joins Forces with Codasip to Speed Up Chip Design Ventures

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June 22, 2023
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Codasip, the leader in RISC-V custom compute, has partnered with SmartDV Technologies, a provider of peripheral design IP, to provide customers with a simplified solution for custom RISC-V processor design.

Under the agreement, Codasip customers will now be able to license a selection of SmartDV peripheral IP under a single license agreement and contract to accelerate and simplify their design projects with IP that is validated for compatibility and ease of integration.

Mike Eftimakis, vice president of strategy and ecosystem at Codasip, said: “SmartDV offers the strongest portfolio of peripheral IP. The combination with our RISC-V processor IP enables our custom compute customers to easily select, design and source a complete system in a much-simplified way. This is the power of having a comprehensive ecosystem. By partnering with SmartDV, we allow our engineering to focus on delivering maximum value for custom compute while making our customers’ lives easier. Access to standard peripherals from a leader in peripheral IP also brings them the confidence of working with best-in-class IP and lets them spend time on differentiation that matters to their application.”

Erik Panu, chief business officer at SmartDV, added: “Our decision to partner with Codasip is rooted not only in their position as a RISC-V leader, but also in our recognition that they share SmartDV’s passionate focus on customization as a key to our users’ success. Pairing SmartDV’s mature peripheral IP with Codasip’s leading-edge processors smooths the way for our joint customers to reach their ASIC, SoC, and FPGA design objectives more quickly, economically, and reliably.”

Today, Codasip and SmartDV have announced their partnership to provide customers with a one-stop-shopping solution for peripheral IP, simplifying custom RISC-V processor design. The combination of Codasip’s powerful processor design automation tools and SmartDV’s broad portfolio of standards-based design IP and verification IP (VIP) allows users to select, design, and source a complete system in a much-simplified way, as well as having access to best-in-class IP for their application.

The partnership between Codasip and SmartDV will enable chip designers to take advantage of the thriving RISC-V ecosystem and reach their ASIC, SoC, and FPGA design objectives quicker, more economically, and more reliably.

Today, Codasip and SmartDV have announced a partnership to provide customers with a one-stop-shopping solution for peripheral IP, simplifying custom RISC-V processor design.

The agreement enables Codasip customers to license a selection of SmartDV peripheral IP under a single license agreement and contract, allowing them to accelerate and simplify their design projects with IP that has been validated for compatibility and ease of integration.

Mike Eftimakis, vice president of strategy and ecosystem at Codasip, said: “The combination with our RISC-V processor IP enables our custom compute customers to easily select, design and source a complete system in a much-simplified way. This is the power of having a comprehensive ecosystem. By partnering with SmartDV, we allow our engineering to focus on delivering maximum value for custom compute while making our customers’ lives easier. Access to standard peripherals from a leader in peripheral IP also brings them the confidence of working with best-in-class IP and lets them spend time on differentiation that matters to their application.”

Erik Panu, chief business officer at SmartDV, added: “Our decision to partner with Codasip is rooted not only in their position as a RISC-V leader, but also in our recognition that they share SmartDV’s passionate focus on customization as a key to our users’ success. Pairing SmartDV’s mature peripheral IP with Codasip’s leading-edge processors smooths the way for our joint customers to reach their ASIC, SoC, and FPGA design objectives more quickly, economically, and reliably.”

The partnership between Codasip and SmartDV will enable chip designers to take advantage of the thriving RISC-V ecosystem and reach their ASIC, SoC, and FPGA design objectives quicker, more economically, and more reliably.

On Thursday 22 June, 2023, Codasip and SmartDV Technologies announced their partnership to provide customers with a one-stop-shopping solution for peripheral IP, simplifying custom RISC-V processor design. The combination of Codasip’s powerful processor design automation tools and SmartDV’s broad portfolio of standards-

The post SmartDV Joins Forces with Codasip to Speed Up Chip Design Ventures first appeared on BusinessMole.

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